- cross-posted to:
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- cross-posted to:
- [email protected]
- [email protected]
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Every thing this guy touches turns to gold. His brother in law though…
Keller’s Touch
This is going to be the breakthrough moment for RISC-V. Jim Keller is a genius.
Alright so this is where the next great cores are likely to come from.
If your mean the next big architecture, sure. If your meaning literal cores, they still have a long way to go. I’m sure they will have competitive performance eventually, but not real soon.
What are the technical constraints on designing RISC-V chips with feature and performance parity to modern x86/ARM designs?
Just design constraints, not manufacturing, or adoption
Mainly just a case of developing the design. If you know how to get performance out of a processor then the instruction set is largely secondary. However, a high performance processor is not a simple thing to design.
That’s not to say the other factors you list aren’t an issue. The latest manufacturing processes are only available from TSMC and all production slots are bought out by nVidia, AMD and Apple. Everybody else has to make do with older processes.
Adoption is probably the easiest one. Linux support for RISC-V is pretty good and recompiling software for it is pretty simple.
