@[email protected] to Programmer [email protected] • 3 months agoSome Mnemonicssh.itjust.worksimagemessage-square19fedilinkarrow-up1343arrow-down16
arrow-up1337arrow-down1imageSome Mnemonicssh.itjust.works@[email protected] to Programmer [email protected] • 3 months agomessage-square19fedilink
minus-square@9point6link26•3 months agoI still don’t know why this architecture went for a Double XOR as the NOP, I guess they were just flexing that the reference chip design could do both in a single cycle
I still don’t know why this architecture went for a Double XOR as the NOP, I guess they were just flexing that the reference chip design could do both in a single cycle