State-backed chipmakers have been trying to push the limit of ASML’s older deep ultraviolet lithography machines, the Dutch supplier’s second-best lineup (after EUVs), with the so-called quadruple patterning technique.

That requires lithographic machines to perform up to four exposures on a silicon wafer, with a total margin of error of no wider than hundredths the diameter of a human hair. Compared to EUV lithography, the multi-patterning technique with DUVs is not only resource-intensive but also prone to alignment errors and yield losses, according to Ying-Wu Liu, an analyst at research firm Yole Group.

That effort isn’t going well because of subpar local gear used in conjunction with ASML’s DUV systems, according to one of the people. On at least one trial production line, engineers have been forced to replace Chinese gear with foreign equipment to ensure reasonable output, the person said.

“Multi-patterning inherently introduces more process steps, increasing the risk of defects and variability,” Liu said. “Additionally, the higher complexity and cost of multi-patterning make it less economically viable for high-volume production of advanced nodes like 5nm.”

I was always skeptical about China’s 7nm fab process. It did not seem economically viable.