- cross-posted to:
- [email protected]
- [email protected]
- cross-posted to:
- [email protected]
- [email protected]
cross-posted from: https://lemmy.ml/post/13412490
Alibaba’s research arm promises server-class RISC-V processor due this year
cross-posted from: https://lemmy.ml/post/13412490
Alibaba’s research arm promises server-class RISC-V processor due this year
ARM is a type of RISC
V, it makes sense their ARM division expands to other RISCVarchitectures.EDIT: ARM is a type of RISC, not RISCV
No it’s not. Arm is a RISC architecture. RISC-V also is a RISC architecture.
Arm is explicitly not RISC-V.
Don’t you mean ARM is a type of RISC? (RISC = Reduced Instruction Set Computer)
CC BY-NC-SA 4.0
Yes, I somehow wrote RISC-V instead of RISC 😅. You’re right.
Arm in this context doesn’t mean ARM.
With all the liberty to do some research before commenting, I’m rather disappointed to see such factually wrong comment.
I did, I just accidentally wrote RISCV instead of RISC. The acronym ARM actually stands for “Acorn RISC Machine”. TheLowSpecGamer has an interesting animated series about it’s development that is worth checking out.
Here is an alternative Piped link(s):
interesting animated series
Piped is a privacy-respecting open-source alternative frontend to YouTube.
I’m open-source; check me out at GitHub.
I can see where this came from. ARM and RISC-V are both reduced instruction set computer (RISC) architechtures but are not the same. Arm is a proprietary ISA originally from Acorn. Risc-v is a new ISA developed completely open-source
EDIT: also, not to be killjoy, but for clarity “research arm” means apendage or division and is completely unrelated
I disagree. The simplest and best reading is they have an ARM CPU for research, and the CPU produced the RISC-V design.
Maybe we’re reading something different, or this is tongue and cheek but "Alibaba’s research arm, the Damo Academy, " sounds like research arm is a synonym for “research division” or “research department”.
Nope, definitely a CPU. It’s the CPU that’s promising the server-class RISC-V processor.
Where in that article do you read that?
The part where it says “arm.”
You’re really not getting the sarcasm here are you…
No, I was hoping it’d be confirmed when I mentiomed it could be tongue in cheek. Doesn’t always come across in a thread where some are unironically making the same point.
I was trying to criticize the original poster by using increasingly ridiculous arguments, when it was obvious they never actually read the article and even misread the post. Something something satire.
I guess it didn’t come off obvious enough. ¯\_(ツ)_/¯
en.m.wikipedia.org/wiki/Reduced_instruction_set_computer