had the issue that they tied their chip designs to specific nodes.
In fairness to Intel, every modern semi design house has that same issue: a chip is designed and laid out for a specific node, so this isn’t really a failing so much as a how-it-works.
Of course, Intel was being very, very, very risky when they were designing for a process that basically didn’t exist assuming that hey, they’ll have it done by the time the design work is complete and they’re RTM.
couldnt just take the design and use it on a different node without a lot of effort
Which is what they had to do once they failed to ship newer nodes on schedule with the new CPU designs, and well, we see how that ultimately cost them a whole hell of a lot, if not ultimately their entire business.
In fairness to Intel, every modern semi design house has that same issue: a chip is designed and laid out for a specific node, so this isn’t really a failing so much as a how-it-works.
I thought i read somewhere that either their design was particularly tailored towards a specific node or that following that they made it a higher priority to be less bound to one. But i can’t find a source for it, so i might be mistaken.
In fairness to Intel, every modern semi design house has that same issue: a chip is designed and laid out for a specific node, so this isn’t really a failing so much as a how-it-works.
Of course, Intel was being very, very, very risky when they were designing for a process that basically didn’t exist assuming that hey, they’ll have it done by the time the design work is complete and they’re RTM.
Which is what they had to do once they failed to ship newer nodes on schedule with the new CPU designs, and well, we see how that ultimately cost them a whole hell of a lot, if not ultimately their entire business.
I thought i read somewhere that either their design was particularly tailored towards a specific node or that following that they made it a higher priority to be less bound to one. But i can’t find a source for it, so i might be mistaken.