Cambridge scientists have developed a new prototype for computer memory that could make for faster chips that could hold up to 100 times more data. The system is made up of barium bridges between films of a disordered material.
To save you a click, they used new material combination, thin films of hafnium oxide connected by barium bridges, to create a memory storage device that can encode states in between 0 and 1 to increase possible information density.
Also, the horizon line on their logo looked like a hair on my phone screen and it bugged me the whole time I was reading the article. I accidentally clicked on it trying to swipe it off the first time.
Pretty much, but they aim to have a continuos range, so they might be able to keep improving the information density by having more accurate readouts across that range.
That’s exactly how NAND flash works though… it’s a continuous range of voltages and they just subdivide it into how ever many bits they want.
The article mentions something about being able to nudge the voltage up and down with this new tech, I guess as opposed to setting to 0 and then writing again, but it’s not clear how that would allow for more bits per cell over NAND rather than just being faster from not needing to erase and write…
Decades ago, the Russians developed a tertiary computer using -5, 0, and 5 volts. It went no where probably because it wasn’t much of an improvement over a binary computer.
To save you a click, they used new material combination, thin films of hafnium oxide connected by barium bridges, to create a memory storage device that can encode states in between 0 and 1 to increase possible information density.
Also, the horizon line on their logo looked like a hair on my phone screen and it bugged me the whole time I was reading the article. I accidentally clicked on it trying to swipe it off the first time.
Removed by mod
Pretty much, but they aim to have a continuos range, so they might be able to keep improving the information density by having more accurate readouts across that range.
That’s exactly how NAND flash works though… it’s a continuous range of voltages and they just subdivide it into how ever many bits they want.
The article mentions something about being able to nudge the voltage up and down with this new tech, I guess as opposed to setting to 0 and then writing again, but it’s not clear how that would allow for more bits per cell over NAND rather than just being faster from not needing to erase and write…
Decades ago, the Russians developed a tertiary computer using -5, 0, and 5 volts. It went no where probably because it wasn’t much of an improvement over a binary computer.